This invention relates to a matrix calculation apparatus suitable for a graphic display.
A graphic display is an apparatus in which, as shown in FIG. 1, a matrix multiplication circuit 3 calculates line segments transferred thereto from a host computer 1 in accordance with instructions from an input device 2 such as a keyboard, so as to execute the enlargement, reduction, rotation, perspective viewing or translating of the figure. After a clipping circuit determines whether or not the figure after the transformation remains within a window, the line segment is transformed into coordinate values of the display screen coordinates by window viewport transformation. A line generation circuit 5 generates pixels interpolated between line segments, an image memory 6 temporarily stores the dot data, and the data is thereafter displayed on a CRT 7.
In order to transform a figure K1 to a figure K2, as shown in FIG. 2, a rotational movement and a translation must be carried out. For this reason, the matrix multiplication circuit 3 executes a multiplication of a transformation matrix R for the rotational movement, and of a transformation matrix P for the translation to obtain a coordinate data L, that is, an affine transformation according to the following formula, for each of the line segments V.sub.0, V.sub.1, V.sub.2 of the figure K1: ##EQU1##
This calculation is done in the following way. First, a multiplication of the translation matrix P as the multiplicand by the rotational transformation matrix R is done to obtain a transformation matrix W, and then all the line segments of the figure are multiplied by the transformation matrix W, using the coordinate matrix or vector (x.sub.i, y.sub.i, z.sub.i, 1) as the multiplicand.
This matrix multiplication is done conventionally in accordance with the following procedure. A transformation matrix U necessary for the calculation is temporarily read out in parallel to a shift register from a stack memory in which element matrices are stored, by a load instruction (FIG. 3III), and the data is converted into serial data by shift clocks. Thereafter, the serial data is applied to a multiplicator as a multiplier (FIG. 3V), and is then multiplied serially by the multiplicand that is input thereto previously.
Although a stack memory is an extremely convenient memory for calculation processing in which the data stored therein must be frequently updated, it has the problem for the serial multiplication such that the multipliers are first called by a load instruction before the start of the calculation and are applied bit-by-bit to the multiplicator by the shift clocks, so that an excessive period of time is needed for the execution of the load instruction, and the calculation time taken by one multiplication is very long.
The coordinate bit data usually consists of 32 bits, but the transformation matrices, such as the rotational transformation matrix R or the translation matrix P, have a long data bit length of 64 bits in order to provide an improved calculation accuracy.
Conventionally, the multiplication of transformation matrices with each other and the multiplication of a transformation matrix by a coordinate matrix are carried out by using a serial multiplicator of a 64-bit capacity. When the transformation matrix W is multiplied by the coordinate matrix, therefore, 32 zeros are added to the high-order bits of the coordinate data so as to make it match the data length of the transformation matrix acting as the multiplier, and the multiplication is effected between the data each comprised of 64 bits.
Accordingly, 64+64=128 shift clocks are required for a single calculation, although the multiplication is actually done between the data of an effective length of 32 bits and the data of an effective length of 64 bits, and although the total length of data actually handled is only 96 bits. In other words, as many as 32 bits of excess clocks are necessary, and time is wasted during the period of the calculation with the transformation matrix W and the coordinate matrix that occupies the major proportion of the calculation time in a graphic display apparatus.